An Implementation and Verification of Performance Monitor for Parallel Signal Processing System

KJC Korea
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pISSN : 1598-849X / eISSN : 2383-9945

http://journal.kci.go.kr/jksci

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An Implementation and Verification of Performance Monitor for Parallel Signal Processing System

¹인하공업전문대학
²청강문화산업대학교

ABSTRACT
열림/닫힘 버튼

In this paper, we implement and verify performance monitor for parallel signal processing system, using DSP Starter Kit(DSK) of which the basic processor is TMS302C6711 chip. The key ideas of this performance monitor is, using Real Time Data Exchange(RTDX) for the purpose of real-time data transfer and function of DSP/BIOS, the ability to measure the performance measure like DSP workload, memory usage, and bridge traffic. In the simulation, FFT, 2D FFT, Matrix Multiplication, and Fir Filter, which are widely used DSP algorithms, have been employed. Using performance monitor and Code Composer Studio from Texas Instrument(TI), the result has been recorded according to different frequencies, data sizes, and buffer sizes for a single wave file. The accuracy of our performance monitor has been verified by comparing those recorded results.
KEYWORDS
열림/닫힘 버튼

DSP(Digital Signal Processing), DSK(DSP Starter Kit), TMS302C6711, RTDX(Real Time Data Exchange), (Code Composer Studio)

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