Design of an Efficient VLSI Architecture and Verification using FPGA-implementation for HMM(Hidden Markov Model)-based Robust and Real-time Lip Reading

이지근; MyungHoonKim; Sang Seol. Lee; Jung， Sung-Tae

Journal of The Korea Society of Computer and Information

Abbr : JKSCI
2006, 11(2), pp.159-168
Publisher : The Korean Society Of Computer And Information
Research Area : Computer Science

이지근 ¹ , MyungHoonKim ² , Sang Seol. Lee ³ , Jung， Sung-Tae ⁴

¹ 원광대학교
² 광주보건대학교
³ 원광대학교
⁴ 원광대학교

ABSTRACT

Lipreading has been suggested as one of the methods to improve the performance of speech recognition in noisy environment. However, existing methods are developed and implemented only in software. This paper suggests a hardware design for real-time lipreading. For real-time processing and feasible implementation, we decompose the lipreading system into three parts; image acquisition module, feature vector extraction module, and recognition module. Image acquisition module capture input image by using CMOS image sensor. The feature vector extraction module extracts feature vector from the input image by using parallel block matching algorithm. The parallel block matching algorithm is coded and simulated for FPGA circuit. Recognition module uses HMM based recognition algorithm. The recognition algorithm is coded and simulated by using DSP chip. The simulation results show that a real-time lipreading system can be implemented in hardware.
KEYWORDS

립리딩(Lipreading) , 음성인식(Speech recognition) , 블록매칭(Block matching)
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