A Hardware Architecture of Regular Expression Pattern Matching for Deep Packet Inspection

윤상균; 이규희

Network Intrusion Detection Systems use regular expression to represent malicious packets and hardware-based pattern matching is required for fast deep packet inspection. Although hardware architectures for implementing constraint repetition operators such as {10} were recently proposed, they have some limitation. In this paper, we propose hardware architecture supporting constraint repetitions of general regular expression sub-patterns with lower logic complexity. The subpatterns supported by the proposed contraint repetition architecture include general regular expression patterns as well as a single character and fixed length patterns. With the proposed building block, we can implement more efficiently regular expression pattern matching hardwares.

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REFERENCES (16)
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* 2021년 이후 발행 논문의 참고문헌은 현재 구축 중입니다.

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[web] / Bleeding Edges / http://bleedingedges.net/

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이 논문은 한국연구재단의 지원을 받아 작성되었습니다.

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