A LSB-first Word-Level Normal Basis Multiplier over GF(2m)

Cho Yong Suk; Choi, Jae Yeon

Journal of Knowledge Information Technology and Systems

Abbr : JKITS
2014, 9(5), pp.571-578
Publisher : Korea Knowledge Information Technology Society
Research Area : Interdisciplinary Research

Cho Yong Suk ¹, Choi, Jae Yeon ²

¹영동대학교
²남서울대학교

ABSTRACT

Finite field multipliers are the basic building blocks in many applications such as error-control coding, cryptography and digital signal processing. Hence, the design of efficient dedicated finite field multiplier architectures can lead to dramatic improvement on the overall system performance. In this paper, LSB-first word-level normal basis multiplier with low latency in Galois field is presented. To speed up multiplication processing, we divide the product polynomial into several parts and then process them in parallel. The proposed multiplier operates in normal basis of GF(2m) and is faster than bit serial ones but with lower area complexity than bit parallel ones. The most significant feature of the proposed architecture is that a trade-off between hardware complexity and delay time can be achieved.
KEYWORDS

Finite fields, Galois fields, Normal Basis, Multipliers, Cryptography
REFERENCES (15)

[book] R. Lidl / 1994 / Introduction to finite fields and their applications / Cambridge University Press

[book] Man Young Rhee / 1989 / Error-correcting coding theory / Mcgraw-Hill

[book] D. Hankerson / 2004 / Guide to elliptic curve cryptography / Springer-Verlag

[journal] E. R. Berlekamp / 1982 / Bit-serial reed-solomon encoders / IEEE Transactions on Information Theory 28(6) : 869~874

[other] J. K. Omura / 1986 / Computational method and apparatus for finite field arithmetic, U.S. Patent #4,587,627

[other] / 2000 / IEEE Std 1363-2000, IEEE Standard Specifications for public-key cryptography

[book] National Institute of Standards and Technology / 2009 / Digital signature standard / FIPS Publications : 186~183

[journal] A. Reyhani-Masoleh / 2002 / A new construction of Massey-Omura parallel multiplier over GF(2m) / IEEE Transactions on Computers 51(5) : 511~520

[journal] C. K. Koc / 1998 / Low-complexity bitparallel canonical and normal basis multipliers for a class of finite fields / IEEE Transactions on Computers 47(3) : 353~356

[journal] T. Beth / 1989 / Algorithm engineering for public key algorithms / IEEE Journal on Selected Areas in Communications 7(4) : 458~466

[journal] G. B. Agnew / 1991 / An implementation for a fast public-key cryptosystem / Journal of Cryptology 3 : 63~79

[journal] L. Song / 1998 / Low-energy digitserial/parallel finite field multipliers / Journal of VLSI Signal Processing 19 : 149~166

[confproc] W. Tang / 2005 / VLSI Implementation of bit-parallel word-serial multiplier in GF(2233) / Proceedings of The 3rd International IEEE-NEWCAS Conference : 399~402

[journal] A. H. Namin / 2007 / Comb architectures for finite field multiplication in F2m / IEEE Transactions on Computers 56(7) : 909~916

[journal] Y. S. Cho / 2012 / A hardware implementation of word-parallel bit-serial polynomial basis multiplier, GDC/IESH/CGAG 2012 / Communications in Computer and Information Science 351 : 176~181
KCI Citation (1)

KJC Korea
Journal Central

Statistics

Tools