A LSB-first Word-Level Normal Basis Multiplier over GF(2m)

Cho Yong Suk; Jae-Yeon Choi

Finite field multipliers are the basic building blocks in many applications such as error-control coding, cryptography and digital signal processing. Hence, the design of efficient dedicated finite field multiplier architectures can lead to dramatic improvement on the overall system performance. In this paper, LSB-first word-level normal basis multiplier with low latency in Galois field is presented. To speed up multiplication processing, we divide the product polynomial into several parts and then process them in parallel. The proposed multiplier operates in normal basis of GF(2m) and is faster than bit serial ones but with lower area complexity than bit parallel ones. The most significant feature of the proposed architecture is that a trade-off between hardware complexity and delay time can be achieved.

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* 2021년 이후 발행 논문의 참고문헌은 현재 구축 중입니다.

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