@article{ART002395874},
author={유병재 and HYUNMOOK CHO},
title={Multi-Clock Generator with Duty-Cycle Correction},
journal={Journal of Software Assessment and Valuation},
issn={2092-8114},
year={2018},
volume={14},
number={1},
pages={47-53}
TY - JOUR
AU - 유병재
AU - HYUNMOOK CHO
TI - Multi-Clock Generator with Duty-Cycle Correction
JO - Journal of Software Assessment and Valuation
PY - 2018
VL - 14
IS - 1
PB - Korea Software Assessment and Valuation Society
SP - 47
EP - 53
SN - 2092-8114
AB - In this paper, we introduce the clock duty correction circuit (DCC), which is a core technology of the clocking circuit required for high-speed SoC. The problem of the conventional non feedback DCC which has mismatch of the XOR and the phase inversion by the initial value is explained, and a new structure of the non feedback DCC circuit is proposed. The proposed DCC circuit has the advantage of using less circuit area compared to the conventional non feedback DCC circuit.
KW - CDR(Clock Data Recovery);Multi-clock generator;PLL(Phase-Locked Loop);EMI/EMC
DO -
UR -
ER -
유병재 and HYUNMOOK CHO. (2018). Multi-Clock Generator with Duty-Cycle Correction. Journal of Software Assessment and Valuation, 14(1), 47-53.
유병재 and HYUNMOOK CHO. 2018, "Multi-Clock Generator with Duty-Cycle Correction", Journal of Software Assessment and Valuation, vol.14, no.1 pp.47-53.
유병재, HYUNMOOK CHO "Multi-Clock Generator with Duty-Cycle Correction" Journal of Software Assessment and Valuation 14.1 pp.47-53 (2018) : 47.
유병재, HYUNMOOK CHO. Multi-Clock Generator with Duty-Cycle Correction. 2018; 14(1), 47-53.
유병재 and HYUNMOOK CHO. "Multi-Clock Generator with Duty-Cycle Correction" Journal of Software Assessment and Valuation 14, no.1 (2018) : 47-53.
유병재; HYUNMOOK CHO. Multi-Clock Generator with Duty-Cycle Correction. Journal of Software Assessment and Valuation, 14(1), 47-53.
유병재; HYUNMOOK CHO. Multi-Clock Generator with Duty-Cycle Correction. Journal of Software Assessment and Valuation. 2018; 14(1) 47-53.
유병재, HYUNMOOK CHO. Multi-Clock Generator with Duty-Cycle Correction. 2018; 14(1), 47-53.
유병재 and HYUNMOOK CHO. "Multi-Clock Generator with Duty-Cycle Correction" Journal of Software Assessment and Valuation 14, no.1 (2018) : 47-53.
