본문 바로가기
  • Home

Multi-Clock Generator with Duty-Cycle Correction

  • Journal of Software Assessment and Valuation
  • Abbr : JSAV
  • 2018, 14(1), pp.47-53
  • Publisher : Korea Software Assessment and Valuation Society
  • Research Area : Engineering > Computer Science

유병재 1 HYUNMOOK CHO 2

1(주)SOCDH
2공주대학교

Candidate

ABSTRACT

In this paper, we introduce the clock duty correction circuit (DCC), which is a core technology of the clocking circuit required for high-speed SoC. The problem of the conventional non feedback DCC which has mismatch of the XOR and the phase inversion by the initial value is explained, and a new structure of the non feedback DCC circuit is proposed. The proposed DCC circuit has the advantage of using less circuit area compared to the conventional non feedback DCC circuit.

Citation status

* References for papers published after 2022 are currently being built.