Low-area Duty Cycle Correction Circuit for Voltage-Controlled Ring Oscillator (전압제어 링 발진기용 저-면적 듀티 사이클 보정 회로)

YU BYEONGJAE (유병재); HYUNMOOK CHO (조현묵)

doi:10.29056/jsav.2019.06.12

Low-area Duty Cycle Correction Circuit for Voltage-Controlled Ring Oscillator

Journal of Software Assessment and Valuation
Abbr : JSAV
2019, 15(1), pp.103-107
DOI : 10.29056/jsav.2019.06.12
Publisher : Korea Software Assessment and Valuation Society
Research Area : Engineering > Computer Science
Received : June 2, 2019
Accepted : June 20, 2019
Published : June 30, 2019

YU BYEONGJAE ¹, HYUNMOOK CHO ²

¹주식회사 아라레연구소
²공주대학교

Candidate

ABSTRACT

Recently, many technologies have been developed to realize low power high speed digital data communication and one of them is related to duty cycle correction. In this paper, a low-area duty cycle correction circuit for a voltage-controlled ring generator is proposed. The duty cycle correction circuit is a circuit that corrects the duty cycle using a 180 degree phase difference of a voltage controlled ring oscillator. The proposed low-area duty cycle circuit changes a conventional flip-flop to a true single phase clocking (TSPC) flip-flop And a low-area high-performance circuit is realized. By using TSPC flip-flop instead of general flip-flop, it is possible to realize low-area circuit compared to existing circuit, and it is expected to be used for high-performance circuit for low-power because it is easy to operate at high speed.

KEYWORDS

Duty Cycle, Voltage Control Ring Oscillator, Flip-Flop, Low Power, High Performance

Citation status

* References for papers published after 2023 are currently being built.

[journal] Yee-Chia Yeo / 2003 / MOSFET gate leakage modeling and selection guide for alternative gate dielectrics based on leakage considerations / IEEE Transactions on Electron Devices 50(4) : 1027~1035

[web] / Double data rate From Wikipedia, the free encyclopedia / https://en.wikipedia.org/wiki/Double_data_rate

[journal] J. C. Ha / 2008 / Unified all-digital duty cycle and phase correction circuit for QDR I/O interface / IET Electronics Letters : 1300~1301

[journal] S. Han / 2011 / Hybrid duty-cycle corrector circuit with dual feedback loop / IET Electronics Letters 47(24) : 1311~1313

[journal] J. Yuan / 1989 / High-speed CMOS circuit technique / IEEE J. Solid-State Circuits 24(1) : 62~70

[confproc] Pengcheng Xu / 2017 / Optimizing TSPC frequency dividers for always-on low-frequency applications in 28nm FDSOI CMOS / 2017 IEEE S3S

[journal] Han-Yeol Lee / 2012 / A true single-phase clocked flip-flop with leakage current compensation / IEICE Electronics Express / Institute of Electronics, Information and Communications Engineers (IEICE) 9(23) : 1807~1812

[journal] N. Goncalves / 1983 / NORA: A racefree dynamic CMOS technique for pipelined logic structures / IEEE J. Soiid-State Circuits SC-18 : 261~266

[confproc] Z. J. L. M. Liu Rong / 2007 / A wearable acceleration sensor system for gait recognition / 2nd IEEE Conference on Industrial Electronics and Applications : 2654~2659

[journal] E. Vildjiounaite / 2006 / Unobtrusive multimodal biometrics for ensuring privacy and information security with personal devices / Pervasive : 187~201

KJCKorea
Journal Central

Journal of Software Assessment and Valuation 2023 KCI Impact Factor : 0.35

Low-area Duty Cycle Correction Circuit for Voltage-Controlled Ring Oscillator

ABSTRACT

KEYWORDS

Citation status

* References for papers published after 2023 are currently being built.

Journal of Software Assessment and Valuation 2023 KCI Impact Factor : 0.35

Low-area Duty Cycle Correction Circuit for Voltage-Controlled Ring Oscillator

ABSTRACT

KEYWORDS

Statistics

Tools

Issue List

Citation status

KCI Citation Counts (0)

REFERENCES (10) * References for papers published after 2023 are currently being built.

Search PDF

Citation

* References for papers published after 2023 are currently being built.