본문 바로가기
  • Home

The Instruction Flash memory system with the high performance dual buffer system

  • Journal of The Korea Society of Computer and Information
  • Abbr : JKSCI
  • 2011, 16(2), pp.1-8
  • Publisher : The Korean Society Of Computer And Information
  • Research Area : Engineering > Computer Science

JUNG BOSUNG 1 Lee Jung Hoon 1

1경상대학교

Accredited

ABSTRACT

NAND type Flash memory has performing much researches for a hard disk substitution due to its low power consumption, cheap prices and a large storage. Especially, the NAND type flash memory is using general buffer systems of a cache memory for improving overall system performance, but this has shown a tendency to emphasize in terms of data. So, our research is to design a high performance instruction NAND type flash memory structure by using a buffer system. The proposed buffer system in a NAND flash memory consists of two parts, i.e., a fully associative temporal buffer for branch instruction and a fully associative spatial buffer for spatial locality. The spatial buffer with a large fetching size turns out to be effective serial instructions, and the temporal buffer with a small fetching size can achieve effective branch instructions. According to the simulation results, we can reduce average miss ratios by around 77% and the average memory access time can achieve a similar performance compared with the 2-way , victim and fully associative buffer with two or four sizes.

Citation status

* References for papers published after 2023 are currently being built.