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Performance Evaluation and Verification of MMX-type Instructions on an Embedded Parallel Processor

  • Journal of The Korea Society of Computer and Information
  • Abbr : JKSCI
  • 2011, 16(10), pp.11-22
  • Publisher : The Korean Society Of Computer And Information
  • Research Area : Engineering > Computer Science

정용범 1 김용민 1 김철홍 2 김종면 1

1울산대학교
2전남대학교

Accredited

ABSTRACT

This paper introduces an SIMD(Single Instruction Multiple Data) based parallel processor that efficiently processes massive data inherent in multimedia. In addition, this paper implements MMX(MultiMedia eXtension)-type instructions on the data parallel processor and evaluates and analyzes the performance of the MMX-type instructions. The reference data parallel processor consists of 16 processors each of which has a 32-bit datapath. Experimental results for a JPEG compression application with a 1280x1024 pixel image indicate that MMX-type instructions achieves a 50% performance improvement over the baseline instructions on the same data parallel architecture. In addition, MMX-type instructions achieves 100% and 51% improvements over the baseline instructions in energy efficiency and area efficiency, respectively. These results demonstrate that multimedia specific instructions including MMX-type have potentials for widely used many-core GPU(Graphics Processing Unit) and any types of parallel processors.

Citation status

* References for papers published after 2022 are currently being built.

This paper was written with support from the National Research Foundation of Korea.