본문 바로가기
  • Home

Efficient On-Chip Idle Cache Utilization Technique in Chip Multi-Processor Architecture

  • Journal of The Korea Society of Computer and Information
  • Abbr : JKSCI
  • 2013, 18(10), pp.13-21
  • Publisher : The Korean Society Of Computer And Information
  • Research Area : Engineering > Computer Science

Jong Wook Kwak 1

1영남대학교

Accredited

ABSTRACT

Recently, although the number of cores on a chip multi-processor increases, multi-programming or multi-threaded programming techniques to utilize the whole cores are still insufficient. Therefore, there inevitably exist some idle cores which are not working. This results in a waste of the caches, so-called idle caches which are dedicated to those idle cores. In this research, we propose amethodology to exploit idle caches effectively as victimcaches of on-chip memory resource. In simulation results, we have achieved 19.4%and 10.2%IPC improvement in 4-core and 16-core respectively, compared to previous technique.

Citation status

* References for papers published after 2023 are currently being built.