@article{ART000968838},
author={Jaejin Kim and Kwan Hyeong, Lee},
title={An Efficient CPLD Technology Mapping considering Area and the Time Constraint},
journal={Journal of The Korea Society of Computer and Information},
issn={1598-849X},
year={2005},
volume={10},
number={3},
pages={11-18}
TY - JOUR
AU - Jaejin Kim
AU - Kwan Hyeong, Lee
TI - An Efficient CPLD Technology Mapping considering Area and the Time Constraint
JO - Journal of The Korea Society of Computer and Information
PY - 2005
VL - 10
IS - 3
PB - The Korean Society Of Computer And Information
SP - 11
EP - 18
SN - 1598-849X
AB - In this paper, we propose a new technology mapping algorithm for CPLD consider area under time constraint. This algorithm detect feedbacks from boolean networks, then variables that have feedback are replaced to temporary variables. Creating the temporary variables transform sequential circuit to combinational circuit. The transformed circuits are represented to DAG. After traversing all nodes in DAG, the nodes that have output edges more than two are replicated and reconstructed to fanout free tree. Using time constraints and delay time of device, the number of graph partitionable multi-level is decided. Several nodes in partitioned clusters are merged by collapsing, and are fitted to the number of OR-terms in a given CLB by bin packing.Proposed algorithm have been applied to MCNC logic synthesis benchmark circuits, and have reduced the number of CLBs by 62.2% than those of DDMAP. And reduced the number of CLBs by 17.6% than those of TEMPLA.
KW - CPLD;Technology Mapping
DO -
UR -
ER -
Jaejin Kim and Kwan Hyeong, Lee. (2005). An Efficient CPLD Technology Mapping considering Area and the Time Constraint. Journal of The Korea Society of Computer and Information, 10(3), 11-18.
Jaejin Kim and Kwan Hyeong, Lee. 2005, "An Efficient CPLD Technology Mapping considering Area and the Time Constraint", Journal of The Korea Society of Computer and Information, vol.10, no.3 pp.11-18.
Jaejin Kim, Kwan Hyeong, Lee "An Efficient CPLD Technology Mapping considering Area and the Time Constraint" Journal of The Korea Society of Computer and Information 10.3 pp.11-18 (2005) : 11.
Jaejin Kim, Kwan Hyeong, Lee. An Efficient CPLD Technology Mapping considering Area and the Time Constraint. 2005; 10(3), 11-18.
Jaejin Kim and Kwan Hyeong, Lee. "An Efficient CPLD Technology Mapping considering Area and the Time Constraint" Journal of The Korea Society of Computer and Information 10, no.3 (2005) : 11-18.
Jaejin Kim; Kwan Hyeong, Lee. An Efficient CPLD Technology Mapping considering Area and the Time Constraint. Journal of The Korea Society of Computer and Information, 10(3), 11-18.
Jaejin Kim; Kwan Hyeong, Lee. An Efficient CPLD Technology Mapping considering Area and the Time Constraint. Journal of The Korea Society of Computer and Information. 2005; 10(3) 11-18.
Jaejin Kim, Kwan Hyeong, Lee. An Efficient CPLD Technology Mapping considering Area and the Time Constraint. 2005; 10(3), 11-18.
Jaejin Kim and Kwan Hyeong, Lee. "An Efficient CPLD Technology Mapping considering Area and the Time Constraint" Journal of The Korea Society of Computer and Information 10, no.3 (2005) : 11-18.
