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Sampling-based Block Erase Table in Wear Leveling Technique for Flash Memory

  • Journal of The Korea Society of Computer and Information
  • Abbr : JKSCI
  • 2017, 22(5), pp.1-9
  • DOI : 10.9708/jksci.2017.22.05.001
  • Publisher : The Korean Society Of Computer And Information
  • Research Area : Engineering > Computer Science
  • Received : October 25, 2016
  • Accepted : December 5, 2016
  • Published : May 31, 2017

Seon Hwan Kim 1 Jong Wook Kwak 1

1영남대학교

Accredited

ABSTRACT

Recently, flash memory has been in a great demand from embedded system sectors for storage devices. However, program/erase (P/E) cycles per block are limited on flash memory. For the limited number of P/E cycles, many wear leveling techniques are studied. They prolonged the life time of flash memory using information tables. As one of the techniques, block erase table (BET) method using a bit array table was studied for embedded devices. However, it has a disadvantage in that performance of wear leveling is sharply low, when the consumption of memory is reduced. To solve this problem, we propose a novel wear leveling technique using Sampling-based Block Erase Table (SBET). SBET relates one bit of the bit array table to each block by using exclusive OR operation with round robin function. Accordingly, SBET enhances accuracy of cold block information and can prevent to decrease the performance of wear leveling. In our experiment, SBET prolongs life time of flash memory by up to 88%, compared with previous techniques which use a bit array table.

Citation status

* References for papers published after 2022 are currently being built.

This paper was written with support from the National Research Foundation of Korea.