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Performance Improvement of Virtualization Sensitive Instruction Emulation by Instruction Decoding at Compile Time

  • Journal of The Korea Society of Computer and Information
  • Abbr : JKSCI
  • 2012, 17(2), pp.1-11
  • Publisher : The Korean Society Of Computer And Information
  • Research Area : Engineering > Computer Science

Shin Dong Ha 1 윤경언 1

1상명대학교

Accredited

ABSTRACT

Recently, we have seen several implementations that virtualize the ARM architecture. Since the current ARM architecture is not possible to be virtualized using the traditional technique called "trap-and-emulation", we usually detect all virtualization sensitive instructions during the run-time of a guest kernel and emulate them virtually rather than executing them directly. The emulation for virtualization is usually implemented either by binary translation or interpretation. Our research is about how to improve the performance of emulation for virtualization based on interpretation. The interpretation usually requires a few steps: instruction fetching, instruction decoding and instruction executing. In this paper, we propose a method that decodes all virtualization sensitive instructions during the compilation time of a guest kernel and reduces the time required for interpretation during the run time of the guest kernel. Our method provides both implementation simplicity and performance improvement of emulation for virtualization based on interpretation.

Citation status

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