2022, Vol.27, No.7

Journal of The Korea Society of Computer and Information 2023 KCI Impact Factor : 0.65

pISSN : 1598-849X / eISSN : 2383-9945
https://journal.kci.go.kr/jksci

Recently, as the use of applications such as big data programs and machine learning programs that are driven while generating large amounts of data in the program itself becomes common, the existing main memory alone lacks memory, making it difficult to execute the program quickly. In particular, the need to derive results more quickly has emerged in a situation where it is necessary to analyze whether the entire sequence is genetically altered due to the outbreak of the coronavirus. As a result of measuring performance by applying large-capacity data to a computing system equipped with a self-developed memory pool MOCA host adapter instead of processing large-capacity data from an existing SSD, performance improved by 16% compared to the existing SSD system. In addition, in various other benchmark tests, IO performance was 92.8%, 80.6%, and 32.8% faster than SSD in computing systems equipped with memory pool MOCA host adapters such as SortSampleBam, ApplyBQSR, and GatherBamFiles by task of workflow. When analyzing large amounts of data, such as electrical dielectric pipeline analysis, it is judged that the measurement delay occurring at runtime can be reduced in the computing system equipped with the memory pool MOCA host adapter developed in this research.

Today, with the advent of the 4th industrial revolution, IoT (Internet of Things) systems are advancing rapidly. For this reason, a various application with high-performance and large-capacity are emerging. Therefore, there is a need for low-power and high-performance memory for computing systems with these applications. In this paper, we propose an effective structure for the L1 cache memory, which consumes the most energy in the computing system. The proposed cache system is largely composed of two parts, the L1 main cache and the buffer cache. The main cache is 2 banks, and each bank consists of a 2-way set association. When the L1 cache hits, the data is copied into buffer cache according to the proposed algorithm. According to simulation, the proposed L1 cache system improved the performance of energy delay products by about 65% compared to the existing 4-way set associative cache memory.

Hash functions are widely used for fast equality analysis of video files because of their fixed small output sizes regardless of their input sizes. However, the hash function has the possibility of a hash collision in which different inputs derive the same output value, so there is a problem that different video files may be mistaken for the same file. In this paper, we propose an equality analysis scheme in which different video files always derive different output values using identifier information and double hash. The scheme first extracts the identifier information of an original video file, and attaches it into the end of the original file with a steganography method. Next the scheme calculates two hash output values of the original file and the extended file with attached identifier information. Finally the scheme utilizes the identifier information, the hash output value of the original file, and the hash output value of the extended file for the equality analysis of video files. For evaluation, we implement the proposed scheme into a practical software tool and show that the proposed scheme performs well the equality analysis of video files without hash collision problem and increases the resistance against the malicious hash collision attack.