As the density of memory chips increases, the probability of having defective components is also increased. However, in case of a small number of defects, it is desirable to reuse a defective die after repair rather than to discard it, because reuse is an essential element for memory device manufactures to cut costs effectively. As for the conventional RA process, it was impossible to know whether a defect could be repaired before the result of the main cell type analysis was obtained. However, in the CRA simulation, a database of each fail type analysis is already in place. Therefore by correlating the data with the fail type we can reduce the whole process of the analysis. In EDS redundancy analysis, time spent in tests and in the RA process is directly connected to cost. Due to the technological developments in the semiconductor industry, memory volume is increasing and the unit price per volume is decreasing. As bigger volume means more various fail types, The CRA simulation will be an effective alternative to save time in the RA process.