2009, Vol.14, No.10

Journal of The Korea Society of Computer and Information 2023 KCI Impact Factor : 0.65

pISSN : 1598-849X / eISSN : 2383-9945
https://journal.kci.go.kr/jksci

Precise branch predictor has a profound impact on system performance in modern processor architectures. Recent works show that prediction latency as well as prediction accuracy has a critical impact on overall system performance as well. However, prediction latency tends to be overlooked. In this paper, we propose Branch Pre-Prediction policy to tolerate branch prediction latency. The proposed solution allows that branch predictor can proceed its prediction without any information from the fetch engine, separating the prediction engine from fetch stage. In addition, we propose newly modified BTB structure to support our solution. The simulation result shows that proposed solution can hide most prediction latency with still providing the same level of prediction accuracy. Furthermore, the proposed solution shows even better performance than the ideal case, that is the predictor which always takes a single cycle prediction latency. In our experiments, IPC improvement is up to 11.92% and 5.15% in average, compared to conventional predictor system.

For a wireless ad-hoc network, event routing algorithm of the publish/subscribe system is especially important for the performance of the system because of the dynamic characteristic and constraint network of its own. In this paper, we propose a new hybrid event routing algorithm, TopSim for efficient publish/subscribe system on the wireless ad-hoc network by extending the ShopParent algorithm by considering not only network overheads to choose a Parent of the publish/subscribe tree, but also topic similarity which is closeness of subscriptions. Our evaluation shows our proposed TopSim performs better for the case where a new joining node subscribed to the multiple topics and there is a node among Parent candidate nodes who subscribe to the ones in the list of multiple topics (related topics).

This paper presents the development of embedded network educational system. This is an educational equipment which enables user to have training over Network Configuration and Embedded network programming practice on Internet environment. The network education system is developed on embedded environment, based on using ethernet interface. On the development environment, PAX255 VLSI chip is used for the processor, the ADSv1.2 for debugging, uC/OS276 for RTOS. The system software was developed using C language. The ping program provided an educational environment for the student to compile and load it to run after doing practice of demonstration behavior. Afterwards programming procedure starts the step-by-step training just like the demonstration function. In other words, programming method how to design the procedure of ARP operation and ICMP operation is explained.